Are you passionate about semiconductor design and verification? Do you want to work at the forefront of chip development for cutting-edge applications? Join our client's team in Milan, Italy, a growing hub for semiconductor and embedded systems innovation, and be part of an industry-leading company driving the future of technology. As a Design and Verification Engineer, you will be responsible for developing, verifying, and optimizing digital designs for high-performance semiconductor solutions. You will work closely with cross-functional teams, contributing to all phases of the ASIC/FPGA design flow, from architecture definition to final verification. Key Responsibilities: Develop and verify digital designs for high-performance semiconductor applications. Implement RTL designs using VHDL/Verilog/SystemVerilog. Apply UVM-based verification methodologies to ensure robust functionality. Work with FPGA/ASIC design flow, synthesis, and timing closure. Utilize industry-standard EDA tools (e.g., Synopsys, Cadence, Mentor Graphics) for design and verification. Debug and analyze issues using waveform analysis tools. Required Qualifications: Strong proficiency in VHDL/Verilog/SystemVerilog for RTL development. Hands-on experience with UVM-based verification methodologies. Knowledge of FPGA/ASIC design flow, synthesis, and timing closure. Experience with industry-standard EDA tools (e.g., Synopsys, Cadence, Mentor Graphics). Strong debugging skills and familiarity with waveform analysis tools. Preferred Qualifications: Experience with formal verification techniques and scripting (Python, Perl, or TCL). Knowledge of low-power design techniques and hardware security principles. Familiarity with RISC-V or ARM-based architectures. Background in machine learning accelerators or high-speed communication protocols (e.g., PCIe, Ethernet, DDR, USB).