We're expanding our team at Ambarella's Parma site in Italy.
Job Summary
The successful candidate will be responsible for developing next-generation Computer Vision processor micro-architecture specifications. This includes designing and implementing video compression logic, image processing logic, and computer vision processors using Verilog and SystemVerilog.
Key Responsibilities
* Developing micro-architecture specifications for a next generation Computer Vision processor;
* Designing and implementing video compression logic, image processing logic, and computer vision processors in Verilog and SystemVerilog;
* Design integration, logic synthesis, and design optimization for timing, area, and power;
* Developing front-end methodologies and tool flows;
* Participating in chip bring-up and testing;
Requirements
* Masters degree in Electrical Engineering with 0-4 years of experience;
* Excellent understanding of Computer architecture, Microprocessor, Digital electronics, VLSI/ASIC design, and Logic design;
* Good knowledge and experience in using hardware description languages like Verilog/SystemVerilog;
* Ability to program in scripting languages such as Python and Perl;
* Knowledge of design verification, and functional coverage;
* Strong communication skills and a good team player;
* Knowledge of logic synthesis and timing closure is mandatory, some experience is a plus;
* Knowledge and/or experience in Image/Video processing, computer vision, machine learning are a plus;